Integrated circuits are produced by means of a fabrication process which converts a circuit design into an operable semiconductor device. The fabrication process consists of a sequence of steps which transforms a wafer of semiconductor material, typically silicon, into a device or devices with multiple layers, with each layer having a specific pattern of structures and interconnections.
After a wafer layer is patterned, samples are inspected to determine the number and location of surface defects acquired during fabrication, and to collect data for the purpose of evaluating the process control procedures used during that stage of the fabrication process. Defects are typically due to the deposition of particulate contaminants during the fabrication process, although they may also be due to the creation of surface irregularities. The inspection is usually carried out by a device known as a scanner. At the present time, there are three types of patterned wafer scanners in normal use.
The first type of scanner is a laser based scanner which uses a laser to scan the surface of a wafer. The scanner detects defects based on the magnitude of the light reflected or scattered after encountering the wafer surface. If a defect is not encountered by the light, the intensity of the scattered and reflected laser light is primarily within the level set by the background noise. However, if a defect is encountered, the scattered laser light produces a strong scattered light pulse, so that its intensity distribution differs from what would be detected in the absence of a defect.
Because the amount of light scattered and reflected from a wafer depends on whether a defect is present, defects can be detected by measuring the intensity of the scattered laser radiation. Signals with an intensity above the background noise level are assumed to correspond to defects.
The scattered laser light is detected by a photo multiplier tube which amplifies the electrical signal corresponding to the detected photons. A properly programmed computer can be used to store the location and intensity of the scattered light as a means of determining the location and estimated size of the defect (based on the scattering cross section). This data can also be used to determine the type of defect present on the wafer, based on polarization studies, estimates of the refractive index of particular materials, etc.
A second type of patterned wafer scanner detects defects by means of digital imaging. In this type of scanner, a digital image of a portion of a wafer is constructed and stored in memory. Another portion of the wafer, which is supposed to have the same pattern(s) is then scanned, and the two images are compared by a computer. If any differences are detected between the images, it is taken as an indication that a defect is present. Another way this type of scanner can be used is to construct a digital image of the same region of two different wafers. Comparison of the images can be used to detect random (as opposed to systematic) errors which occur during the fabrication process.
A third type of patterned wafer scanner detects defects by constructing a holographic image of the wafer surface. This technique is based on spatial frequency filtering which is performed in the Fourier Transform plane of the wafer pattern. Because the spatial frequency spectrum of most patterned wafers is distinct from the spatial frequency spectrum of defects, this method is very effective at separating the transform of a repetitive pattern of a device element (or unit cell) from that of a defect.
In order to apply this technique, a spatial frequency filter is generated and placed in the Fourier Transform plane to separate and remove the repetitive unit cell information from the defect information. The wavefront of the filtered spectrum, containing only the defect information, is then recorded in a hologram. Reconstruction of the recorded wave front from the hologram enables restoration of the filtered (defect) spectrum and permits its reverse ray tracing through the same lens used to perform the transform. The result is a high resolution image of the defects contained in the wafer. The locations and sizes of the defects are determined by scanning the image field with a solid-state light sensor. The defect data is then processed and made available to the engineers involved in the fabrication process.
A problem with the types of scanners discussed above is that if the wafer surface itself is textured or colored (such as occurs with metal or polysilicon materials), these features may be falsely detected as defects. To prevent such false detections, the sensitivity of the scanner is sometimes reduced. To make this masking of false defects consistent between wafers, the sensitivity adjustment must be performed repeatedly. This adds time to the fabrication process and introduces another variable which can affect comparisons of the number and types of defects detected on different wafers.
The sensitivity of a scanner can also be a function of the optics, or of the stability of the laser used in a particular scanner. This makes it even more difficult to compare defect data obtained from different wafers, or during different stages of the fabrication process.
A further difficulty is that because the operation of each of the types of scanners is based on different principles, their sensitivity may be a function of the type of defects present. For instance, some types of scanners are better at detecting high-contrast defects, while others are most sensitive to defects having a minimum size in a preferred dimension. This makes it even harder to compare scan results obtained from different stages of the fabrication process or between different types of scanners.
As indicated, patterned wafer scanners are an integral part of the quality control stage of semiconductor device fabrication. Therefore, it is important that there be no significant variation in their operation over time. This is one motivation for the development of a method of calibrating such scanners. In addition, because the sensitivity of the scanners varies as a function of the type and number of material layers deposited on a wafer and the type of defects present, correctly detecting defects during the entire fabrication process requires that the scanners be able to be calibrated at various stages of the process.
For example, during the deposition of the first few layers in a fabrication process, the scanners operate at their highest level of sensitivity. This is because there is not yet a sufficient number of background layers or structures to interfere with the detection capability of the scanner. As the number of material layers deposited increases, the background noise level increases and the scanner is less effective at detecting defects. As a result, a greater (and unrepresentative) proportion of the defects detected would be those occurring during the early stages of the fabrication process. This is actually contrary to what would be expected, since the level of defects is expected to increase as the wafer is processed.
Another benefit of having a reliable calibration scheme for patterned wafer scanners is that it would permit the direct comparison of the performance of different scanners. This would assist vendors of such scanners to market them to potential customers, because the detection capability of a scanner when applied to a particular stage or type of fabrication process could be determined based on a standardized scale.
At present, calibration methods do exist for unpatterned wafer scanners, that is scanners which examine silicon wafers which have been cleaned and polished, but have not yet had material layers deposited or structures formed on them. These methods are usually based on the use of a calibration wafer which is formed by depositing particles (such as polystyrene latex, referred to as PSL) on unprocessed wafers. However, this approach is not suitable for use with patterned wafer scanners for several reasons.
The first reason is that patterned wafer scanners utilize a pattern recognition technique for scanning over the wafer. The lack of a pattern on the wafer makes it difficult (if not impossible) for the scanners to consistently go to the same location on a wafer when different wafers are scanned.
In addition, the patterns on a wafer are used for adjusting the focus of the scanner. Improper or partial focusing can cause a reduction of the scanner's sensitivity. This can cause the results of the scan to be less useful and not reproducible.
Finally, the proper detection of defects using a patterned wafer scanner requires that highly repetitive patterns be used. This is because repetitive patterns produce the least amount of optical and electrical noise, thereby increasing the likelihood of obtaining meaningful scan results when the scanner is operated at high sensitivity levels.
A related reason for not using the same calibration standard as that used for unpatterned wafer scanners is that the deposition of PSL particles on an unpatterned wafer may not be a realistic representation of the type of defects introduced during an actual fabrication process. A more accurate calibration would be one based on a calibration wafer which more closely represented the types of materials and deposition techniques used during the fabrication of an actual device.
Attempts have been made to develop calibration wafers for patterned wafer scanners. Vendors of scanners have fabricated wafers with a known defect pattern using photolithographic techniques, and used these to calibrate their equipment. However, one problem with this method is that the sizes and shapes of the defects are limited by the resolution achieved by the photolithographic techniques. At present the resolution of such techniques places a lower limit of 0.5 .mu.m on the size of the features which can be transferred to a wafer. However, patterned wafer scanners are capable of detecting and resolving features as small as 0.1 .mu.m. This means that defects which may be capable of impacting the operation of devices cannot be reproduced on calibration wafers. The result is that the defect data cannot be relied on to the extent desired. This problem points out the desirability of developing a non-lithography based method of creating defects on calibration wafers.
Another means of producing calibration wafers for patterned wafer scanners is based on ion beam etching. This involves using a focused ion beam to etch a desired pattern of features onto a wafer. This method is of limited utility because some types of scanners cannot adequately scan calibration wafers which contain this type of defect.
Although it is possible to use any wafer having a repetitive pattern and on which has been deposited particles of a known size and material (such as a wafer produced in the course of a normal fabrication process) as a calibration standard, this does not provide an optimal method for calibrating patterned wafer scanners. One reason is that in most cases, such wafers lack the amount of scanable area required to obtain statistically valid data.
Another problem is that while using such a wafer assists with determining the repeatability of the scan results for that type of wafer, it does not permit the sensitivity of the scanner to be evaluated. This is because of the difficulty in precisely controlling the concentration of deposited particles within small regions, so that the level of defects on the wafer would not be known to the desired degree of certainty. Such a calibration method would also not allow the capabilities of different scanners to readily be compared. Instead, a calibration method is needed which will enable the scan results from different scanners to be compared with each other, and which is suitable for assessing the sensitivity of such scanners.
What is desired is a uniform calibration wafer for patterned wafer scanners and a method for using such wafers. These should allow the defect detection capabilities of different scanners to be compared, and should be readily useable during the entire fabrication process.